| 摘要 |
In a double edge triggered flip-flop circuit, a first latch circuit latches input data at either one of rising edge and falling edge of clock signal. A second latch circuit, which is provided in parallel with the first latch circuit, latches the input data at the other of the either one of rising edge and falling edge of the clock signal. At least one of the first latch circuit and the second latch circuit is configured by an SRAM (Static Random Access Memory) type.
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