| 摘要 |
In a method and system for fabricating a semiconductor device ( 100 ) having a package-on-package structure, a bottom laminate substrate (BLS) ( 130 ) is formed to include interconnection patterns (IP) ( 170, 172 ) coupled to a plurality of conductive bumps (PCB) ( 130 ). A top substrate (TS) ( 140 ) is formed to mount a top package ( 110 ) by forming a polyimide tape (PT) ( 142 ) affixed to a metal layer (ML) ( 144 ), and a top die ( 136 ) attached to the ML ( 144 ) on an opposite side as the PT ( 142 ). A laminate window frame (LWF) ( 150 ), which may be a part of the BLS ( 130 ), is fabricated along a periphery of the BLS ( 130 ) to form a center cavity ( 160 ). The center cavity ( 160 ) enclosed by the BLS, the LWF and the TS houses the top die ( 136 ) affixed back-to-back to a bottom die ( 134 ) that is affixed to the BLS ( 130 ). The IP ( 170, 172 ) formed in the BLS and the LWS ( 150 ) provide the electrical coupling between the ML ( 144 ), the top and bottom dies ( 136, 134 ), and the PCB ( 130 ). |
