发明名称 |
Configuration and manufacturing method of low-resistance gate structures for semiconductor devices and circuits |
摘要 |
The present invention provides methods for fabricating devices with low resistance structures involving a lift-off process. A radiation blocking layer is introduced between two resist layers in order to prevent intermixing of the photoresists. Cavities suitable for the formation of low resistance T-gates or L-gates can be obtained by a first exposure, developing, selective etching of blocking layer and a second exposure and developing. In another embodiment, a low resistance gate structure with pillars to enhance mechanical stability or strength is provided.
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申请公布号 |
US2011180850(A1) |
申请公布日期 |
2011.07.28 |
申请号 |
US20100657602 |
申请日期 |
2010.01.25 |
申请人 |
SHIH ISHIANG;QIU CHUNONG;QUI CINDY X;SHIH YI-CHI |
发明人 |
SHIH ISHIANG;QIU CHUNONG;QUI CINDY X.;SHIH YI-CHI |
分类号 |
H01L29/772;H01L21/335 |
主分类号 |
H01L29/772 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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