发明名称 SEMICONDUCTOR DEVICE EQUIPPED WITH REGISTER CONTROL DELAY LOCK LOOP
摘要 <P>PROBLEM TO BE SOLVED: To provide a semiconductor device equipped with a register control delay lock loop (DLL) capable of reducing current consumption caused by unnecessary toggling of DLL clock. <P>SOLUTION: The semiconductor device comprising an internal circuit that uses a DLL clock outputted from a register control DLL, includes a means for generating clock enable signals for enabling or disabling the DLL clock applied to the internal circuit, in response to an operation signal and a non-operation signal for the semiconductor device. The means for generating the clock enable signals includes: a driving means that executes pull-down or pull-up operation in response to the operation signal or non-operation signal; a reset means for resetting the output node of the driving means in response to the operation signal for the semiconductor device; and an output means which latches the signal applied to the output node of the driving means, and outputs it after buffering. <P>COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2011147165(A) 申请公布日期 2011.07.28
申请号 JP20110052054 申请日期 2011.03.09
申请人 HYNIX SEMICONDUCTOR INC 发明人 KWON KI-SEOP;LEE SEONG-HOON
分类号 G06F1/10;H03K5/135;G11C7/22;G11C11/407;G11C11/4076;H03K5/00;H03K5/13;H03K23/40;H03L7/00;H03L7/08;H03L7/081 主分类号 G06F1/10
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