发明名称 |
Circuit of on-chip network having four-node ring switch structure |
摘要 |
A hierarchical ring architecture is constructed with on-chip networks. The on-chip network includes two type-0 ring nodes and two type-1 ring nodes. Multiple data transfer is provided in parallel between multiple processor cores or multiple functional units and register banks with a dynamic configuration. A low control complexity, an optimized local bandwidth, an optimized remote node path, a low routing complexity, and a simplified circuit is thus obtained.
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申请公布号 |
US7987313(B2) |
申请公布日期 |
2011.07.26 |
申请号 |
US20080068752 |
申请日期 |
2008.02.11 |
申请人 |
NATIONAL CHUNG CHENG UNIVERSITY |
发明人 |
CHOU SHU-HSUAN;CHANG MING-KU;CHAN YI-CHAO;CHEN TIEN-FU |
分类号 |
G06F13/00;G08C15/00;H04J1/14;H04L12/28 |
主分类号 |
G06F13/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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