发明名称 |
Method for designing integrated circuit incorporating memory macro |
摘要 |
An integrated circuit design method whereby memory instances are assigned to memory macros integrated within an integrated circuit. A plurality of memory instances operating at the same operation frequency are assigned to a single memory macro. A frequency multiplier which receives a first clock signal is arranged to generate a second clock signal through frequency multiplication of the first clock signal, and feeds the second clock signal to the plurality of memory instances. A control circuit which selects the memory instances in synchronization is arranged with the first clock signal.
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申请公布号 |
US7986583(B2) |
申请公布日期 |
2011.07.26 |
申请号 |
US20090379041 |
申请日期 |
2009.02.11 |
申请人 |
RENESAS ELECTRONICS CORPORATION |
发明人 |
MIZUNO MASAHARU;SUZUKI MASAHIRO;UCHINO SHINICHI |
分类号 |
G11C8/00 |
主分类号 |
G11C8/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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