发明名称 Enhanced cap layer integrity in a high-K metal gate stack by using a hard mask for offset spacer patterning
摘要 When forming transistor elements on the basis of sophisticated high-k metal gate structures, the efficiency of a replacement gate approach may be enhanced by more efficiently adjusting the gate height of transistors of different conductivity type when the dielectric cap layers of transistors may have experienced a different process history and may thus require a subsequent adaptation of the final cap layer thickness in one type of the transistors. For this purpose, a hard mask material may be used during a process sequence for forming offset spacer elements in one gate electrode structure while covering another gate electrode structure.
申请公布号 US7981740(B2) 申请公布日期 2011.07.19
申请号 US20100821583 申请日期 2010.06.23
申请人 GLOBALFOUNDRIES INC. 发明人 LENSKI MARKUS;RUTTLOFF KERSTIN;MAZUR MARTIN;SELIGER FRANK;OTTERBACH RALF
分类号 H01L21/8238;H01L21/336 主分类号 H01L21/8238
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