发明名称 |
Semiconductor device and a method of manufacturing the same |
摘要 |
A technology is provided to reduce ON-resistance, and the prevention of punch through is achieved with respect to a trench gate type power MISFET. Input capacitance and a feedback capacitance are reduced by forming a groove in which a gate electrode is formed so as to have a depth as shallow as about 1 μm or less, a p−type semiconductor region is formed to a depth so as not to cover the bottom of the groove, and a p-type semiconductor region higher in impurity concentration than the p−type semiconductor region is formed under a n+type semiconductor region serving as a source region of the trench gate type power MISFET, causing the p-type semiconductor region to serve as a punch-through stopper layer of the trench gate type power MISFET.
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申请公布号 |
US7981747(B2) |
申请公布日期 |
2011.07.19 |
申请号 |
US20090385979 |
申请日期 |
2009.04.27 |
申请人 |
RENESAS ELECTRONICS CORPORATION |
发明人 |
SHIRAISHI MASAKI;NAKAZAWA YOSHITO |
分类号 |
H01L29/72;H01L29/78;H01L21/265;H01L21/336;H01L29/08;H01L29/10;H01L29/423;H01L29/45;H01L29/49 |
主分类号 |
H01L29/72 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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