发明名称 Flash backed DRAM module with a selectable number of flash chips
摘要 A memory device for use with a primary power source and a backup power source, includes: volatile memory; an interface for connecting to a backup power source; a plurality of ports, each of which is for receiving a different corresponding non-volatile memory chip; a plurality of interfaces, each of which is for communicating through a different corresponding one of the plurality of ports with any non-volatile memory connected to that port; a controller that is programmed to activate a selectable set of the plurality of interfaces depending on which ports are to receive non-volatile memory chips, wherein said controller is also programmed to react to a loss of power from the primary power source by moving data from the volatile memory through the selected interfaces to whatever non-volatile memory is connected to the selectable set of interfaces.
申请公布号 US7983107(B2) 申请公布日期 2011.07.19
申请号 US20090369076 申请日期 2009.02.11
申请人 STEC, INC. 发明人 MOSHAYEDI MARK;FINKE DOUGLAS
分类号 G11C5/14 主分类号 G11C5/14
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