发明名称 PARAMETER FIFO
摘要 <p>A graphics system may include one or more processing units for processing a current display frame, each processing unit including a plurality of parameter registers for storing parameter settings used in processing the current display frame. A parameter buffer in the graphics system may store frame packets, with each frame packet containing information corresponding to parameter settings to be used for at least one display frame. A control circuit coupled to the buffer and to the one or more processing units may retrieve and process a top frame packet from the parameter buffer to update one or more of the parameter registers according to the contents of the top frame packet. The control circuit may issue DMA requests to fill the parameter buffer with frame packets transferred from system memory, where the frame packets may be written by an application (or software) executing on a central processing unit.</p>
申请公布号 WO2011085029(A1) 申请公布日期 2011.07.14
申请号 WO2011US20259 申请日期 2011.01.05
申请人 APPLE INC.;BRATT, JOSEPH P.;CHOO, SHING HORNG;HOLLAND, PETER F.;MILLET, TIMOTHY J. 发明人 BRATT, JOSEPH P.;CHOO, SHING HORNG;HOLLAND, PETER F.;MILLET, TIMOTHY J.
分类号 G09G5/36 主分类号 G09G5/36
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