发明名称 |
Multi-stage dual successive approximation register analog-to-digital convertor and method of performing analog-to-digital conversion using the same |
摘要 |
A multi-stage dual successive approximation register analog-to-digital converter (SAR ADC) and a method of performing analog-to-digital conversion using the same are provided. The multi-stage dual SAR ADC includes: a plurality of SAR ADC stages for converting an analog input voltage into a predetermined bit digital signal, each SAR ADC stage being serially connected to one another and including two SAR ADCs; and at least one residue amplifier respectively connected between every two successive SAR ADC stages, amplifying residue voltage output from a previous SAR ADC stage to output the amplified residue voltage to a next SAR ADC stage. The two SAR ADCs of the previous SAR ADC stage share the residue amplifier.
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申请公布号 |
US7978117(B2) |
申请公布日期 |
2011.07.12 |
申请号 |
US20090539406 |
申请日期 |
2009.08.11 |
申请人 |
ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE |
发明人 |
JEON YOUNG DEUK;CHO YOUNG KYUN;NAM JAE WON;KWON JONG KEE |
分类号 |
H03M1/34 |
主分类号 |
H03M1/34 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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