发明名称 NAND flash memory
摘要 A NAND flash memory that is read while a selected bit line and a non-selected bit line are adjacent to each other, has a memory cell array having a plurality of blocks each of which is composed of a plurality of memory cell units, each of the memory cell units having a plurality of electrically rewritable memory cells that are connected to each other, wherein a bit line that is selected by a sense amplifier is charged in a state where a drain-side select gate line, a source-side select gate line and a p-type semiconductor substrate are set at a ground potential, and source lines, n-type wells, p-type wells, and a bit line that is not selected by the sense amplifier are in a floating state.
申请公布号 US7978517(B2) 申请公布日期 2011.07.12
申请号 US20100719686 申请日期 2010.03.08
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 ISOBE KATSUAKI
分类号 G11C11/34 主分类号 G11C11/34
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