| 摘要 |
PURPOSE: A method for manufacturing a trench power MOSFET semiconductor device is provided to improve integration by reducing a region between adjacent vertical gates. CONSTITUTION: First trenches are formed on a first conductive semiconductor substrate(210). The second trenches are formed by etching a part of the bottoms of the first trenches. Vertical gates(235) are formed by successively gap-filling poly silicon and gate oxide layer in the second trenches. A second conductive impurity region is formed on the surfaces of the second trench and the semiconductor substrate by an implant process. An interlayer dielectric layer is gap-filled in the second trench with the impurity region. A photo resist pattern is formed to expose the surface of the semiconductor substrate except for the gap-filled interlayer dielectric layer. Third trenches(262,266) are formed by etching the semiconductor substrate using a photoresist pattern as a mask. Metal materials are formed to fill the third trenches after the photo resist pattern is removed.
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