SEMICONDUCTOR MEMORY APPARATUS INCLUDING DATA COMPRESSION TEST CIRCUIT

摘要

PURPOSE: A flash memory apparatus and a solid state storage system using the same are provided to reduce a chip area by securing the layout of a laminated chip. CONSTITUTION: In a flash memory apparatus and a solid state storage system using the same, a first chip test signal generator(112) is arranged in a first chip. A first chip test signal generator generates a first chip test signal. A second chip test signal generator(122) is arranged in a second chip. A second chip test signal generator generates a second chip test signal. A final data determination unit(200) generates a final test signal.