| 摘要 |
A phase lock loop device and a control method is disclosed in the present invention. The phase lock loop device includes a phase lock loop circuit and a memory unit. The phase lock loop generates a phase lock clock signal according to a control voltage. The memory unit couples the phase lock loop circuit. The memory unit provides an initial signal to the phase lock loop circuit for recovering the control voltage to a preset value according to a digital value while the phase lock loop circuit is enabled.
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