发明名称 SEMICONDUCTOR MOLD PACKAGE
摘要 <P>PROBLEM TO BE SOLVED: To provide a semiconductor mold package capable of responding to the case where a terminal intended to use an inductance component of a wire, and a terminal intended to reduce wire length as much as possible are mixed in a semiconductor chip. <P>SOLUTION: Fig. 12 is a layout drawing showing a lead frame shape obtained by intendedly shortening a lead frame and extending wire length. In Fig. 12, 1, 3, 5, 6 and 10 are a lead frame, an LSI, a wire for connecting the LSI 3 to an inner lead frame, an inner lead frame extended to the vicinity of the LSI 3, and an inner lead frame having an inner lead intendedly shortened, respectively. An inner lead frame 10 used when a terminal intended to use an inductance component of the wire 5 and a terminal intended to shorten the wire length as much as possible are mixed is shown in Fig.12. The wire length may be increased, as shown in Fig.9, by extending an inner lead frame 8, and thereafter shotening an inner lead frame 7 only for a desired terminal in advance. <P>COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2011129960(A) 申请公布日期 2011.06.30
申请号 JP20110074733 申请日期 2011.03.30
申请人 MITSUBISHI ELECTRIC CORP 发明人 TAKAAI JUN;MIYAWAKI KATSUMI
分类号 H01L23/50;H01L21/60 主分类号 H01L23/50
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