| 摘要 |
The present invention relates to a method for making a chip package. The method includes the following steps: (a) providing a substrate having at least one conductive via; (b) disposing the substrate on a carrier; (c) removing part of the substrate, so as to expose the conductive via, and form at least one through via; (d) disposing a plurality of chips on a surface of the substrate, wherein the chips are electrically connected to the through via of the substrate; (e) forming an encapsulation; (f) removing the carrier; (g) conducting a flip-chip mounting process; (h) removing the encapsulation; and (i) forming a protective material. Whereby, the carrier and the encapsulation can avoid warpage of the substrate during the manufacturing process.
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