发明名称 Clock jitter compensation
摘要 A method of compensating for sampling clock jitter, the method comprising: receiving a modulated signal; sampling the modulated signal using a clock signal having a clock jitter to provide a sampled modulated signal (Y AM ); downmixing the sampled modulated signal with a local oscillator signal (LO) to provide a downmixed signal having a first modulating signal (Y downmixed,I ) and a second modulating signal (Y downmixed,Q ); calculating a phase difference between the first modulating signal and the second modulating signal; and feeding back the calculated phase difference (Õ r ) to the downmixed signal to correct for the clock jitter.
申请公布号 EP2339755(A1) 申请公布日期 2011.06.29
申请号 EP20090252809 申请日期 2009.12.16
申请人 NXP B.V. 发明人 RUTTEN, ROBERT;JANSSEN, ERWIN;BREEMS, LUCIEN JOHANNES
分类号 H03M1/08;H04L27/34 主分类号 H03M1/08
代理机构 代理人
主权项
地址