APPARATUS AND METHOD USING TWO PHASE UTTERANCE VERIFICATION ARCHITECTURE FOR COMPUTATION SPEED IMPROVEMENT OF N-BEST RECOGNITION WORD
摘要
PURPOSE: A voice recognition apparatus and method having two-step utterance verification structure for reducing the complexity of N-best recognized word calculation are provided to induce the re-utterance of a user or notify the user of an utterance error. CONSTITUTION: Using a first model, a voice recognition module(130) recognizes the voice of input voice data. The voice recognition module outputs a first N-best word list. An utterance verification module(140) creates a second N-best word list. Using a second model, the utterance verification module creates a final N-best word list from the second N-best word list.
申请公布号
KR20110070688(A)
申请公布日期
2011.06.24
申请号
KR20100033376
申请日期
2010.04.12
申请人
ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
发明人
KANG, JEOM JA;JEON, HYUNG BAE;JUNG, HO YOUNG;KANG, BYUNG OK;LEE, SUNG JOO;PARK, KI YOUNG;LEE, YUN KEUN;KIM, JONG JIN;PARK, JEON GUE;WANG, JI HYUN;CHUNG, EUI SOK;JUNG, HOON;PARK, SANG KYU