Method of controlling a cache memory to increase an access speed to a main memory, and a computer using the method

摘要

A cache memory control method and a corresponding computer is disclosed, in which a cache memory (50) is connected to a main memory (5) and divided into a plurality of cache blocks (10), and a lock/unlock signal is supplied to the cache memory (50) either to set a replace-inhibition state of at least one of the cache blocks (10), in which state replacing at least one of the cache blocks (10) to the main memory (5) is inhibited, or to reset the replace-inhibition state of at least one of the cache blocks (10) such that replacing at least one of the cache blocks (10) to the main memory (5) is allowed. Either reading or writing of the main memory (5) is performed by using the remaining cache blocks of the cache memory (50), other than the at least one of the cache blocks, such that, when the replace-inhibition state is set by the lock/unlock signal, replacing the at least one of the cache blocks to the main memory (5) is inhibited during the reading or writing of the main memory (5).