发明名称 |
Efficient complex multiplication and fast fourier transform (FFT) implementation on the ManArray architecture |
摘要 |
Efficient computation of complex multiplication results and very efficient fast Fourier transforms (FFTs) are provided. A parallel array VLIW digital signal processor is employed along with specialized complex multiplication instructions and communication operations between the processing elements which are overlapped with computation to provide very high performance operation. Successive iterations of a loop of tightly packed VLIWs are used allowing the complex multiplication pipeline hardware to be efficiently used. In addition, efficient techniques for supporting combined multiply accumulate operations are described. |
申请公布号 |
US7962719(B2) |
申请公布日期 |
2011.06.14 |
申请号 |
US20080187746 |
申请日期 |
2008.08.07 |
申请人 |
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发明人 |
PITSIANIS NIKOS P.;PECHANEK GERALD GEORGE;RODRIGUEZ RICARDO |
分类号 |
G06F9/38;G06F15/76;G06F9/30;G06F9/302;G06F15/16;G06F15/173;G06F15/80;G06F17/14;G06F17/16 |
主分类号 |
G06F9/38 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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