发明名称 Structure for Bumped Wafer Test
摘要 A semiconductor device includes a substrate having a first conductive layer disposed on a top surface of the substrate. A first insulation layer is formed over the substrate and contacts a sidewall of the first conductive layer. A second conductive layer is formed over the first insulation layer. The second conductive layer includes a first portion disposed over the first conductive layer and a second portion that extends beyond an end of the first conductive layer. A second insulation layer is formed over the second conductive layer. A first opening in the second insulation layer exposes the first portion of the second conductive layer. A second opening in the second insulation layer away from the first opening exposes the second portion of the second conductive layer. The second insulation layer is maintained around the first opening. A conductive bump is formed over the first portion of the second conductive layer.
申请公布号 US2011121295(A1) 申请公布日期 2011.05.26
申请号 US201113019643 申请日期 2011.02.02
申请人 STATS CHIPPAC, LTD. 发明人 KUAN FRANCIS HEAP HOE;DO BYUNG TAI;CHEW LEE HUANG
分类号 H01L23/488 主分类号 H01L23/488
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