发明名称 Offset Phase-Locked Loop Transmitter and Method Thereof
摘要 An offset phase-locked loop (PLL) transmitter comprises a clock generator that generates a first clock signal; a detector that detects a phase difference between an input data signal and a feedback data signal to generate a control signal; a controlled oscillator, coupled to the detector, that generates an output data signal according to the control signal; a mixer, coupled to the controlled oscillator and the clock generator, that mixes the output data signal according to the first clock signal to generate the feedback data signal; and a control circuit, coupled to the detector and the controlled oscillator, that adjusts the operating frequency curve of the controlled oscillator by one of a first step distance and a second step distance smaller than the first step distance such that the control signal is substantially equal to a predetermined value.
申请公布号 US2011122965(A1) 申请公布日期 2011.05.26
申请号 US20100911071 申请日期 2010.10.25
申请人 MSTAR SEMICONDUCTOR, INC. 发明人 YEN SHIH-CHIEH;WANG YAO-CHI;HSIEH MING-YU
分类号 H04L27/00 主分类号 H04L27/00
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