发明名称 SINGLE-LAYER BOARD ON CHIP PACKAGE SUBSTRATE, AND MANUFACTURING METHOD THEREOF
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a single-layer board on chip package substrate in which high density can be achieved and manufacturing costs can be reduced, and to provide a manufacturing method of the single-layer board on chip package substrate. <P>SOLUTION: The single-layer board on chip package substrate includes an insulator 10, a circuit pattern 12 and a flip-chip bonding pad 14 which are provided on an upper surface of the insulator 10, a conductive bump 15, which is in contact with a lower surface of the circuit pattern 12 and penetrates through the insulator 10, a solder resist layer 20 which is formed on the upper surface of the insulator 10 so that at least a portion of the flip-chip bonding pad 14 is exposed, and a flip-chip bonding bump which is provided on an upper surface of the flip-chip bonding pad 14 in order to make a flip-chip connection with an electronic element 30. <P>COPYRIGHT: (C)2011,JPO&INPIT</p>
申请公布号 JP2011103432(A) 申请公布日期 2011.05.26
申请号 JP20100093777 申请日期 2010.04.15
申请人 SAMSUNG ELECTRO-MECHANICS CO LTD 发明人 KIM JI-EUN;OH NAM-KEUN;PARK JUNG-HYUN;KIM YOUNG-JI;CHOI JONG-GYU;KIM SANG-DUEK;SHIN EIKAN;IN KEIRO
分类号 H01L23/12 主分类号 H01L23/12
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