| 摘要 |
PURPOSE: A flag based low complexity split-radix FET system and method thereof are provided to reduce the complexity of calculation by regulating an operation of a split-radix algorithm and to obtain a flag to a sample. CONSTITUTION: An operation memory(810) stores an input and output sample of a split-radix butterfly operation. A Twiddle memory unit(820) stores a twiddle factor value. An address generating unit(800) generates the address of the operation memory unit and the Twiddle memory. An operation unit(840) reads the input sample and reads an output sample to the operation memory. A flag generator(830) adds a control signal to the input sample.
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