发明名称 Two's complement circuit
摘要 A operator is located between two converters that convert data between floating-point format and a predetermined format. The operator operates on predetermined format data, which consists of the same sign bit, the same exponent, and the two's complement of the mantissa of the corresponding floating-point data. When the operator is an arithmetic logic unit (ALU), the number of operations for a given calculation can be reduced.
申请公布号 US7949695(B2) 申请公布日期 2011.05.24
申请号 US20040904152 申请日期 2004.10.27
申请人 VIA TECHNOLOGIES INC. 发明人 SONG SHAWN
分类号 G06F7/00;G06F7/485;G06F7/487;G06F7/50 主分类号 G06F7/00
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