| 摘要 |
PROBLEM TO BE SOLVED: To improve the speed of reading a semiconductor memory where bit data of a memory element is read through internal differential data lines and inputted to a sense amplifier circuit, and a latch circuit is connected to the output terminal of the sense amplifier circuit. SOLUTION: An external power source is connected to the latch circuit. The external power source is connected to the source terminals of crosslinked transistors (CP1) and (CP2) via a transistor for a sense amplifier activation switch where a sense amplifier activation signal line is connected to a gate terminal. The gate terminal of the crosslinked transistor (CP2) is connected to the drain terminal of the crosslinked transistor (CP1). The gate terminal of the crosslinked transistor (CP1) is connected to the drain terminal of the crosslinked transistor (CP2). The drain terminals of two internal signal input buffer transistors, where the internal differential data lines are connected to the gate terminals, are connected to the gate terminals of the crosslinked transistors (CP1) and (CP2) and the gate terminal of the latch circuit. COPYRIGHT: (C)2011,JPO&INPIT |
