发明名称 CIRCUIT LAYOUT STRUCTURE
摘要 A circuit layout structure includes a metal interlayer dielectric layer surrounding a metal interconnect and a metal pattern within a scrub line. The scrub line is in the vicinity of the metal interlayer dielectric layer and the metal interconnect. The metal pattern or the metal interconnect are suitably segregated to reduce a capacitance charging effect.
申请公布号 US2011108991(A1) 申请公布日期 2011.05.12
申请号 US20090615276 申请日期 2009.11.10
申请人 TSAI CHING LONG;BAI SHI JIE;LIU SHAN;ZHANG YU 发明人 TSAI CHING LONG;BAI SHI JIE;LIU SHAN;ZHANG YU
分类号 H01L23/48 主分类号 H01L23/48
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