发明名称 Chip package structure
摘要 A chip package structure is provided. The chip package structure comprises a first substrate, a second substrate and a plurality of chips. Therein, one of the chips is connected to the first substrate and electrically connected to the first substrate through a via hole of the first substrate. Thereby, the second substrate does not need the via hole for electrical connection of chips and thus, the surface thereof is adapted to remain intact to allow for the disposition of conductive balls throughout the surface.
申请公布号 US7939950(B2) 申请公布日期 2011.05.10
申请号 US20080269112 申请日期 2008.11.12
申请人 CHIPMOS TECHNOLOGIES INC. 发明人 WU CHENG-TING;LU I-CHENG;CHANG YU-CHENG;WANG TSU-TING
分类号 H01L23/34;H01L23/48 主分类号 H01L23/34
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