发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE |
摘要 |
PROBLEM TO BE SOLVED: To reduce a leakage current of a capacitive element formed with an MISFET. SOLUTION: In this semiconductor integrated circuit device including a capacitive element formed with an MISFET, a capacitive element C<SB>1</SB>in an analog PLL circuit wherein the leakage current becomes a problem is formed with a p-channel type MISFET using a thick gate oxide film (9B). A power stabilization capacitive element C<SB>2</SB>uses a thin gate oxide film (9A)≤3 nm to reduce its area. The power stabilization capacitive element C<SB>2</SB>may be formed with a p-channel type MISFET or n-channel type MISFET because a gate electrode is fixed to a power supply (Vdd). COPYRIGHT: (C)2011,JPO&INPIT
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申请公布号 |
JP2011091437(A) |
申请公布日期 |
2011.05.06 |
申请号 |
JP20110011795 |
申请日期 |
2011.01.24 |
申请人 |
RENESAS ELECTRONICS CORP |
发明人 |
SUZUKI KAZUHISA;TAKAHASHI TOSHIRO;YANAGISAWA YASUNOBU;NONAKA YUSUKE |
分类号 |
H01L27/04;H01L21/822;H01L21/8234;H01L21/8238;H01L27/06;H01L27/092 |
主分类号 |
H01L27/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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