发明名称 |
MULTI-BIT TEST CONTROL CIRCUIT |
摘要 |
A multi-bit test control circuit includes an operation unit, a delay unit, and a generation unit. The operation unit is configured to combine a single source signal inputted to each bank with a delay signal generated by delaying the source signal by a certain time to generate a first pulse signal. The delay unit is configured to delay the first pulse signal by a certain time. The generation unit is configured to combine an output signal of the operation unit with an output signal of the delay unit to generate a second pulse signal for a bank interleaving multi-bit test.
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申请公布号 |
US2011103163(A1) |
申请公布日期 |
2011.05.05 |
申请号 |
US20100792444 |
申请日期 |
2010.06.02 |
申请人 |
KIM KWI-DONG;PARK MUN-PHIL;KIM SUNG-HO |
发明人 |
KIM KWI-DONG;PARK MUN-PHIL;KIM SUNG-HO |
分类号 |
G11C7/00;G11C29/00 |
主分类号 |
G11C7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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