发明名称 Method for forming shielded gate field effect transistor using spacers
摘要 A trench is formed in a semiconductor region. A dielectric layer lining sidewalls and bottom surface of the trench is formed. The dielectric layer is thicker along lower sidewalls and the bottom surface than along upper sidewalls of the trench. After forming the dielectric layer, a lower portion of the trench is filled with a shield electrode. Dielectric spacers are formed along the upper trench sidewalls. After forming the dielectric spacers, an inter-electrode dielectric (IED) is formed in the trench over the shield electrode. After forming the IED, the dielectric spacers are removed.
申请公布号 US7935577(B2) 申请公布日期 2011.05.03
申请号 US20080344859 申请日期 2008.12.29
申请人 FAIRCHILD SEMICONDUCTOR CORPORATION 发明人 GREBS THOMAS E.;KRAFT NATHAN LAWRENCE;RIDLEY RODNEY
分类号 H01L21/8232;H01L21/00;H01L21/336;H01L21/84 主分类号 H01L21/8232
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