发明名称 Symmetric non-intrusive and covert technique to render a transistor permanently non-operable
摘要 A technique for and structures for camouflaging an integrated circuit structure. The technique including forming active areas of a first conductivity type and LDD regions of a second conductivity type resulting in a transistor that is always non-operational when standard voltages are applied to the device.
申请公布号 US7935603(B1) 申请公布日期 2011.05.03
申请号 US20070807896 申请日期 2007.05.29
申请人 HRL LABORATORIES, LLC;RAYTHEON CORPORATION;PROMTEK 发明人 CHOW LAP-WAI;CLARK, JR. WILLIAM M.;HARBISON GAVIN J.;YANG PAUL OU
分类号 H01L21/336 主分类号 H01L21/336
代理机构 代理人
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