发明名称 System and method for limiting exposure of hardware failure information for a secured execution environment
摘要 A method and apparatus for limiting the exposure of hardware failure information is described. In one embodiment, an error reporting system of a processor may log various status and error address data into registers that retain their contents through a warm reset event. But the error reporting system of the processor may then determine whether the processor is operating in a trusted or secure mode. If not, then the processor's architectural state variables may also be logged into registers. But if the processor is operating in a trusted or secure mode, then the logging of the architectural state variables may be inhibited, or flagged as invalid.
申请公布号 US7934076(B2) 申请公布日期 2011.04.26
申请号 US20040956322 申请日期 2004.09.30
申请人 INTEL CORPORATION 发明人 FISCHER STEPHEN A.;DATTA SHAMANNA M.
分类号 G06F9/00 主分类号 G06F9/00
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