发明名称 FAULT DETECTION AND CLASSIFICATION METHOD FOR WAFER ACCEPTANCE TEST PARAMETERS
摘要 A fault detection and classification (FDC) method for wafer acceptance test (WAT) parameters includes the following steps. A plurality of fault detection and classification parameters is collected. A plurality of wafer acceptance test parameters that are corresponded by the fault detection and classification parameters is collected. The fault detection and classification parameters are grouped. A contingency table of the wafer acceptance test parameters corresponding to the fault detection and classification parameters is built. A probability model of the contingency table is built. Finally, a safety range of the probability model is determined.
申请公布号 US2011093226(A1) 申请公布日期 2011.04.21
申请号 US20100978879 申请日期 2010.12.27
申请人 INOTERA MEMORIES, INC. 发明人 CHIEH-CHU YIJ;CHEN CHUN CHI;TIAN YUN-ZONG;CHEN CHENG-HAO
分类号 G06F17/18;G06F19/00 主分类号 G06F17/18
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