| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor memory device that is advantageous in stabilizing the operation. SOLUTION: The semiconductor memory device includes: a plurality of upper interconnections WL; a plurality of lower interconnections BL; dummy upper interconnections DWL0 having wire widths larger than the upper interconnection; memory cells MC arranged at positions of the crossings of the upper interconnections and the lower interconnections; first dummy cells DMCW arranged at positions of the crossings of the dummy upper interconnections and the lower interconnections; and a control circuit 17 applying a first voltage to the selected upper interconnections, applying a second voltage to the nonselected upper interconnections, applying a third voltage to the dummy upper interconnections and independently controlling the first to third voltages so as to differ from each other. COPYRIGHT: (C)2011,JPO&INPIT |
