发明名称 METHOD AND CIRCUIT FOR TRANSFERRING CLOCK AND FRAME
摘要 PROBLEM TO BE SOLVED: To provide a method and circuit for transferring a clock and a frame which transfers an input SONET (Synchronous Optical Network)/SDH (Synchronous Digital Hierarchy) signal on a system clock by mapping the SONET/SDH signal on an OTN (Optical Transport Network) frame without using an OTN clock. SOLUTION: The method includes the steps of: performing serial-parallel conversion of an input data signal at timing of an input clock, and outputting an intermediate data signal with an opened gap for inserting different data signal frame data thereinto; selecting the intermediate data signal at predetermined timing and inserting frame data into the gap at predetermined timing; writing data in a second data signal frame format in a memory at the predetermined timing; and reading the data of the memory with a processing clock of a system side and outputting a second data signal and an enable signal. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2011071729(A) 申请公布日期 2011.04.07
申请号 JP20090220899 申请日期 2009.09.25
申请人 FUJITSU LTD 发明人 MAKISHIMA HIROMICHI;YOKOKURA ICHIRO
分类号 H04J3/00;H04L13/08 主分类号 H04J3/00
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