| 摘要 |
Data encoding system and method for implementing robust non-volatile memories. A data bit is stored using two memory cells. The data bit is represented by setting a voltage level of a first memory cell to a first voltage level and setting a voltage level of a second memory cell to a second voltage level. In one embodiment, the first voltage level and the second voltage level are of opposite polarity. In one embodiment, to store a data bit having the value “0,” the first memory cell is set to a first voltage level and the second memory cell is set to a second voltage level of opposite polarity to the first voltage level, and to store a data bit having the value “1,” the first memory cell is set to a third voltage level and the second memory cell is set to a fourth voltage level of opposite polarity to the third voltage level. In an illustrative embodiment, the first voltage level is of substantially equal magnitude, and of opposite polarity, to the second voltage level, the third voltage level is of substantially equal magnitude, and of opposite polarity, to the fourth voltage level, the first voltage level is substantially equal to the fourth voltage level, and the second voltage level is substantially equal to the third voltage level. In one embodiment, the data stored according to the present invention is read out by comparing the relative voltages of the first and second memory cells with a differential sense amplifier.
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