发明名称 Method for incorporating pattern dependent effects in circuit simulations
摘要 Methods, software, and apparatus for providing a netlist for simulation that includes one or more parameters that are determined by one or more pattern dependent effects. One particular embodiment of the present invention receives a layout of a circuit including one or more MOSFET transistors. For one or more of the MOSFET transistors, spacing between transistors is measured using the received layout and a pattern dependent parameter is determined. This parameter modifies the length of the gate that is used in simulation. In other embodiments, other pattern dependent effects can be used to determine the values of one or more parameters. These parameters may be used to modify gate length, emitter size, resistor width, or other device characteristics.
申请公布号 US7917883(B2) 申请公布日期 2011.03.29
申请号 US20050043609 申请日期 2005.01.24
申请人 ALTERA CORPORATION 发明人 WATT JEFFREY
分类号 G06F17/50 主分类号 G06F17/50
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