发明名称 SURFACE LAYER EVALUATING METHOD FOR SEMICONDUCTOR WAFER
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a surface layer evaluating method for a semiconductor wafer, wherein the method can evaluate distribution of electrically active defects and contaminations in the depth direction of a surface layer of a semiconductor wafer. <P>SOLUTION: A plurality of depth dependency graphs by temperatures of photoluminescence intensity of a semiconductor wafer of good quality and a reference temperature dependence graph are generated, and a dominant wafer depth region of photoluminescence intensity is obtained for each of the depth dependency graphs by the temperatures to generate a measured temperature dependence graph. Then, the measured temperature dependence graph is contrasted with the reference temperature dependence graph to evaluate defects and contaminations. Further, the temperature of a part where a shift quantity is large is obtained, and depth regions of defects and contaminations of the measured wafer are estimated from dominant wafer depth regions of one of the depth dependency graphs by the temperatures that corresponds thereto. <P>COPYRIGHT: (C)2011,JPO&INPIT</p>
申请公布号 JP2011060861(A) 申请公布日期 2011.03.24
申请号 JP20090206376 申请日期 2009.09.07
申请人 SUMCO CORP 发明人 ONO TAKASHI;NAGAI SEIJI;MATSUMOTO KEI
分类号 H01L21/66 主分类号 H01L21/66
代理机构 代理人
主权项
地址