发明名称 PLL CIRCUIT AND ELECTRONIC APPARATUS
摘要 PROBLEM TO BE SOLVED: To independently set up stability and frequency pull-in speed while suppressing an increase in the circuit scale of a PLL circuit. SOLUTION: A PLL circuit 1 has: a ring oscillator 2 which generates an oscillation signal through a delay closed loop 19 for delaying a signal; a phase comparator 3; a charge pump 4; a smoothing filter 5; a smoothing current source 6; a delay component filter 7; and a correction current source 8. The delay component filter 7 is connected to the output of the charge pump 4 in parallel with the smoothing filter 5 and extracts a response delay component included in the output signal of the charge pump 4. The ring oscillator 2 has a delay section 11, which is operated by a current supplied from at least one of the smoothing current source 6 and the correction current source 8, and delays a signal, as a delay section for delaying a signal in the delay closed loop 19. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2011061545(A) 申请公布日期 2011.03.24
申请号 JP20090209669 申请日期 2009.09.10
申请人 SONY CORP 发明人 TAKAHASHI NAOKI
分类号 H03L7/093 主分类号 H03L7/093
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