发明名称 EQUALIZER CIRCUIT AND RECEPTION APPARATUS
摘要 An equalizer circuit includes: a plurality of amplifiers that convert a voltage signal into a current; a plurality of capacitive loads that are charged and discharged in accordance with respective outputs of the plurality of amplifiers; a charge discharge circuit provided for each of the plurality of capacitive loads to charge or discharge one of the plurality of capacitive loads; and a reset circuit provided for each of the capacitive loads to initialize the charge stored in the one of the plurality of capacitive loads, wherein a current according to the voltage signal is integrated in different periods for each of the plurality of capacitive loads and the capacitive load is discharged through the current in a first period and the capacitive load is charged through the current in a second period following the first period.
申请公布号 US2011068847(A1) 申请公布日期 2011.03.24
申请号 US20100876880 申请日期 2010.09.07
申请人 FUJITSU LIMITED 发明人 HAMADA TAKAYUKI;TAMURA HIROTAKA
分类号 G06G7/19 主分类号 G06G7/19
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