发明名称 Data processing unit and bus arbitration unit
摘要 An effective bus arbitration unit is described in which it is possible to reduce, as much as possible, the waiting time until a bus master obtain bus ownership and improve the rate of operating the bus while improving the throughput of data transfer. A bus master issues a size signal (for example, signal “CDSZ”) indicative of the size of data to be read or written. A state machine 155 grants bus ownership to the bus master for the bus cycles corresponding to the size signal in order to enable the bus master to successively read or write data. Arbitration is performed once for every series of bus cycles corresponding to the size requested by the bus master. Since the size signal is issued by the bus master as a size signal indicative of the necessary and sufficient size for data transmission, the state machine 155 can set an optimal number of bus cycles.
申请公布号 US7908416(B2) 申请公布日期 2011.03.15
申请号 US20050569753 申请日期 2005.05.27
申请人 SSD COMPANY LIMITED 发明人 KATO SHUHEI;SANO KOICHI;USAMI KOICHI
分类号 G06F13/36;G06F12/00;G06F13/00;G06F13/362;G06F13/364 主分类号 G06F13/36
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