发明名称 Multi-processor architecture for a device
摘要 Aspects of the invention provide apparatuses and methods for composing a device with different types of multi-processor subsystems based on expected latency times and processing bandwidths. An apparatus may include multi-processor subsystems with different performance characteristics that interact with each other through bridge modules and a central packet network. Different types of multi-processor subsystems include a multi-point bus network, a circuit-switched network, a packet-switch network, and a shared block device. The apparatus includes a plurality of components, where each component has at least one multi-processor subsystem. The apparatus may be partitioned into different detachable parts, which can operate in an independent manner. The detachable parts may be joined so that the detachable parts can interact. A service in one multi-processor subsystem may interact with another service in another multi-processor subsystem by sending messages between the services.
申请公布号 US7903642(B2) 申请公布日期 2011.03.08
申请号 US20070999314 申请日期 2007.12.04
申请人 NOKIA CORPORATION 发明人 VOUTILAINEN MARTTI KALEVI;SANDSTROM KIM
分类号 H04L12/66;G06F13/36;H04L12/28 主分类号 H04L12/66
代理机构 代理人
主权项
地址