| 摘要 |
A method is disclosed of manufacturing an integrated circuit. The method comprises providing a substrate (100) comprising a source region (102) and a drain region (104) separated by a channel region (106, 406), said channel region being covered by a gate stack separated from the channel region by a dielectric layer (110), the gate stack comprising a metal portion (112) over the dielectric layer (110) and a polysilicon portion (116) over the metal portion (112); implanting an oxide reducing dopant (130) into the polysilicon portion (116); depositing a silicidation metal (140) over the implanted polysilicon portion (116); and converting the implanted polysilicon portion (116) into a suicide portion. By fully converting the polysilicon portion (116) into a suicide portion, the dopant (130) is ‘snow-ploughed’ towards the interface between the metal portion (112) and the polysilicon portion (116) where it reacts with any oxide formed at said interface. This yields an IC having a plurality of transistors, which gates have a low enough contact resistance to facilitate radio frequency operating speeds.
|
