发明名称 METHOD FOR MANUFACTURING OF WAFER LEVEL DEVICE PACKAGE
摘要 PURPOSE: A method for manufacturing of a wafer level device package is provided to reduce process time and costs by replacing a complex photolithography process with a simple electroless plating process. CONSTITUTION: A conductive pad(110) is formed in at least one region of a substrate(100). A first insulation layer(120) having an opening part exposing a conductive pad to outside is formed on the substrate. A wring layer(130) contacting the conductive pad is formed in the first insulating layer. A conductive diffusion barrier(135) sealing the wiring layer is formed on the wiring layer A second insulating layer(140) having a contact hole exposing a part of the conductive diffusion barrier is formed on the conductive diffusion barrier. A bump pad is formed on a contact hole.
申请公布号 KR101018172(B1) 申请公布日期 2011.02.28
申请号 KR20090076190 申请日期 2009.08.18
申请人 SAMSUNG ELECTRO-MECHANICS CO., LTD. 发明人 JEON, HYUNG JIN;KWEON YOUNG DO;PARK, SEUNG WOOK;LEE, JONG YUN
分类号 H01L21/60;H01L21/288 主分类号 H01L21/60
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