发明名称 METHOD OF DESIGNING SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING THE SAME
摘要 <p><P>PROBLEM TO BE SOLVED: To prevent a high-resistance defect and an open defect of a via while reducing an element or a wiring arrangement area. <P>SOLUTION: A semiconductor device 100 includes: a capacitor 112 including a lower electrode 106, an upper electrode 110, and a capacitor film 108 formed therebetween; a first via group including one or more first vias (128) electrically connected to the lower electrode 106; and a second via group including one or more second vias (130) electrically connected to the upper electrode 110 and formed simultaneously with the first via group. The semiconductor device 100 is designed according to a method including the step of setting the numbers of first vias and second vias in such a way that a value obtained by dividing a capacitance value of the capacitor 112 by the total number of first vias (128) and second vias (130) included in the first via group and the second via group becomes less than or equal to a predetermined value. <P>COPYRIGHT: (C)2011,JPO&INPIT</p>
申请公布号 JP2011040621(A) 申请公布日期 2011.02.24
申请号 JP20090187499 申请日期 2009.08.12
申请人 RENESAS ELECTRONICS CORP 发明人 ARIKAWA HISASHI
分类号 H01L21/82;H01L21/768;H01L21/822;H01L27/04 主分类号 H01L21/82
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