| 摘要 |
A design verification apparatus includes a dataset generator to generate verification datasets which associate each unit process of a plurality of procedures (processing scenarios) described in a design specification of a target product with an identifier (label) designating which portion of the design specification is to be verified. A process priority setting unit assigns a process priority to each verification dataset according to specified identifiers. An output processor outputs data identifying the verification datasets, together with explicit indication of their process priorities.
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