发明名称 VIAS AND CONDUCTIVE ROUTING LAYERS IN SEMICONDUCTOR SUBSTRATES
摘要 Through vias and conductive routing layers in semiconductor substrates and associated methods of manufacturing are disclosed herein. In one embodiment, a method for processing a semiconductor substrate includes forming an aperture in a semiconductor substrate and through a dielectric on the semiconductor substrate. The aperture has a first end open at the dielectric and a second end opposite the first end. The method can also include forming a plurality of depressions in the dielectric, and simultaneously depositing a conductive material into the aperture and at least some of the depressions.
申请公布号 WO2011022180(A2) 申请公布日期 2011.02.24
申请号 WO2010US43563 申请日期 2010.07.28
申请人 MICRON TECHNOLOGY, INC.;KIRBY, KYLE, K.;NIROUMAND, SARAH, A. 发明人 KIRBY, KYLE, K.;NIROUMAND, SARAH, A.
分类号 H01L21/768;H01L21/28;H01L21/3205 主分类号 H01L21/768
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