发明名称 Iterative decoder with early-exit condition detection and methods for decoding
摘要 Embodiments of an iterative decoder with early-exit condition detection and methods for decoding are generally described herein. Other embodiments may be described and claimed. In some embodiments, a first codeword is generated from decoded bits after one or more half-iterations of an iterative decoder, a second codeword from decoded bits after an additional half-iteration of the iterative decoder, and the first and second codewords are compared to determine whether the decoded bits are valid. In some embodiments, double or triple codeword matching is selected based on an estimated signal-to-noise ratio (SNR) and the modulation level.
申请公布号 US7895506(B2) 申请公布日期 2011.02.22
申请号 US20060612350 申请日期 2006.12.18
申请人 INTEL CORPORATION 发明人 BHORA VEERENDRA;SUDHAKAR RAGHAVAN
分类号 H03M13/03 主分类号 H03M13/03
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